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Microchip Technology /ATSAML22J18A /OSCCTRL /STATUS

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Interpret as STATUS

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (XOSCRDY)XOSCRDY 0 (XOSCFAIL)XOSCFAIL 0 (XOSCCKSW)XOSCCKSW 0 (OSC16MRDY)OSC16MRDY 0 (DFLLRDY)DFLLRDY 0 (DFLLOOB)DFLLOOB 0 (DFLLLCKF)DFLLLCKF 0 (DFLLLCKC)DFLLLCKC 0 (DFLLRCS)DFLLRCS 0 (DPLLLCKR)DPLLLCKR 0 (DPLLLCKF)DPLLLCKF 0 (DPLLTO)DPLLTO 0 (DPLLLDRTO)DPLLLDRTO

Description

Power and Clocks Status

Fields

XOSCRDY

XOSC Ready
XOSCFAIL

XOSC Clock Failure Detector
XOSCCKSW

XOSC Clock Switch
OSC16MRDY

OSC16M Ready
DFLLRDY

DFLL Ready
DFLLOOB

DFLL Out Of Bounds
DFLLLCKF

DFLL Lock Fine
DFLLLCKC

DFLL Lock Coarse
DFLLRCS

DFLL Reference Clock Stopped
DPLLLCKR

DPLL Lock Rise
DPLLLCKF

DPLL Lock Fall
DPLLTO

DPLL Timeout
DPLLLDRTO

DPLL Ratio Ready

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Register License

Copyright © 2018 Microchip Technology Inc.

SPDX-License-Identifier: Apache-2.0

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data